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VIA Cyrix III
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  Our
View: |
| [+] |
Good for cheap, entry-level
desktops only |
| [+] |
Socket-compatible Celeron
competitor with four times the integrated L1 cache |
| [+] |
133MHz bus speed support |
| [+] |
Supports 3DNow! for game play |
| [-] |
No L2 cache |
| [-] |
Poor overall performance,
regardless of clock speed |
 VIA
Cyrix III Specifications: |
 | Joshua: Based on Cyrix' 22-million transistor
Cayenne core and 'PR' rated like in the old days.
Never sees light of day. |
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| Mobile: With 'LongHaul' technology' to extend
battery life |
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| Samuel: Based on IDT's 11.2-million transistor
WinChip core and finally clockspeed rated like everyone else |
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| Clock |
Bus |
Volts |
Connector |
Cache
(Speed) |
Size |
Temp |
Power |
Introduced |
PR433
333 |
133 |
2.2 |
Socket 370 |
L1: 64kB
L2: 256kB (Full) |
0.18µ |
85°C |
20W |
Feb
2000 |
PR466
366 |
133 |
2.2 |
Socket 370 |
L1: 64kB
L2: 256kB (Full) |
0.18µ |
85°C |
22W |
Feb
2000 |
PR500
400 |
133 |
2.2 |
Socket 370 |
L1: 64kB
L2: 256kB (Full) |
0.18µ |
85°C |
23W |
Feb
2000 |
PR533
433/450 |
133 |
2.2 |
Socket 370 |
L1: 64kB
L2: 256kB (Full) |
0.18µ |
85°C |
25W |
Feb
2000 |
| 500 |
66 / 100 / 133 |
1.9 / 2.0 |
Socket 370 |
L1: 128kB |
0.18µ |
70°C |
12W |
Jun
2000 |
| 500 |
66 / 100 / 133 |
1.9 |
Socket 370 |
L1: 128kB |
0.18µ |
|
2-10W |
Sep
2000 |
| 533 |
66 / 100 / 133 |
1.9 |
Socket 370 |
L1: 128kB |
0.18µ |
70°C |
12W |
Jun
2000 |
| 550 |
66 / 100 / 133 |
1.9 / 2.0 |
Socket 370 |
L1: 128kB |
0.18µ |
70°C |
14W |
Jun
2000 |
| 600 |
66 / 100 / 133 |
1.9 / 2.0 |
Socket 370 |
L1: 128kB |
0.18µ |
70°C |
15W |
Jun
2000 |
| 600 |
66 / 100 / 133 |
1.9 |
Socket 370 |
L1: 128kB |
0.18µ |
|
2-10W |
Sep
2000 |
| 650 |
66 / 100 / 133 |
1.9 / 2.0 |
Socket 370 |
L1: 128kB |
0.18µ |
70°C |
16W |
Nov 2000 |
| 667 |
66 / 100 / 133 |
1.9 / 2.0 |
Socket 370 |
L1: 128kB |
0.18µ |
70°C |
16W |
Jun
2000 |
| 700 |
66 / 100 / 133 |
1.9 / 2.0 |
Socket 370 |
L1: 128kB |
0.18µ |
70°C |
17W |
Jan
2001 |
| VIA
Cyrix-III Roadmap (tecChannel) |
| Information provided as is from published sources. |
| Although we strive to maintain the accuracy of this information, The CPU
Scorecard assumes no liability for costs or damages resulting from its use. |
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